Download e-book for iPad: Three Dimensional System Integration: IC Stacking Process by Antonis Papanikolaou, Dimitrios Soudris, Riko Radojcic

Methods Materials

By Antonis Papanikolaou, Dimitrios Soudris, Riko Radojcic

ISBN-10: 1441909613

ISBN-13: 9781441909619

ISBN-10: 1441909621

ISBN-13: 9781441909626

Three Dimensional method Integration: IC Stacking From technique expertise to approach layout Edited through: Antonis Papanikolaou Dimitrios Soudris Riko Radojcic three-d (3D) built-in circuit (IC) stacking allows packing extra performance, in addition to integration of heterogeneous fabrics, units, and signs, within the related area (volume). This leads to buyer electronics (e.g., cellular, hand held units) which may run extra robust functions, reminiscent of full-length video clips and 3D video games, with longer battery existence. This know-how is so promising that it truly is anticipated to be a mainstream expertise under 10-15 years from its unique perception. to accomplish this kind of finish product, adjustments within the complete production and layout means of digital platforms are happening. This ebook presents an summary of the complete trajectory from uncomplicated approach expertise matters to the layout on the process point of 3 dimensionally built-in nano-electronic structures. actual layout and layout on the structure and approach point are emphasised during this booklet, because the expertise has matured to the purpose that those concerns became extremely important. This e-book is meant for an viewers with a simple snatch of electric engineering strategies together with a few familiarity with fabrication of semiconductor units, Very huge Scale Integration (VLSI) and laptop structure. •Covers the full diversity of 3D chip stacking issues in any such manner non-expert (in 3D integration) reader can comprehend precisely what this know-how is, why it truly is precious, the way it adjustments traditional practices and the way it may have an effect on his/her paintings; •Provides a high-level (tutorial-like) description of 3D process integration that would conceal matters starting from method expertise and production of 3D structures to the layout of 3D parts and whole structures; •First e-book to provide not just a high-level view of the full box of 3D integration, but additionally an figuring out of the interactions among some of the stages of layout and manufacturing.

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Additional info for Three Dimensional System Integration: IC Stacking Process and Design

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In Digest of technical Papers. 1 Definition and Structure of a TSV The through-silicon via (TSV) is composed of a conductor, also named “nail” or “plug,” crossing the Si substrate of the stacked dies [1, 2], as shown in Fig. 1. The conductor [common material choices include copper (Cu), tungsten (W), and ­polysilicon] is electrically insulated from the substrate by a dielectric layer (usually SiO2) and interconnects the metal wires of the stacked dies. The geometry of the TSV conductor may vary depending on the 3D stacking technology.

Both the geometry and the equivalent circuit of the coupled TSVs are rather complex due to the cylindrical shape of TSVs and the semiconductor nature of the substrate between them, as shown in Fig. 9. The silicon substrate among the TSVs is connected to the ground; therefore, a few electric field lines would be originating from one TSV and terminating on the other, providing a minimal mutual capacitance between neighboring TSVs. , the TSV pitch). The crosstalk between two TSVs in the presence of a substrate contact, as shown in Fig.

In fact, a leaky TSV represents a waste of static energy toward the substrate, and a consequent potential voltage drop on interconnects that could violate the noise margins of the digital signals. The TSV should also withstand potential overstresses caused by ESD-EMI events without being damaged and becoming leaky. One of the potential contributing factors to the TSV leakage and breakdown is the lack of uniformity of the insulator layer thickness: local reduction of oxide thickness increases locally the electric field between the plug and the substrate, thus increasing the possibility of leakage and breakdown.

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Three Dimensional System Integration: IC Stacking Process and Design by Antonis Papanikolaou, Dimitrios Soudris, Riko Radojcic

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