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Extra info for Noise-Shaping All-Digital Phase-Locked Loops: Modeling, Simulation, Analysis and Design

Example text

7. th(m) is equal to the sum of the first m periods of the oscillator. Moreover, the system “oscillator plus counter” operates as a comparator in a flash TDC. In fact, the “oscillator plus counter” increments the output of the counter by one when tin is greater than th(m); otherwise, the output of the counter is constant. The duration of the mth period of the oscillator is the time resolution r es(m) of the oscillator-based TDC, as can be seen by comparing Figs. 2. In an ideal oscillator-based TDC, the duration of the periods of the oscillator is constant and is equal to the nominal time resolution r esn .

28 can produce a difference in the interval [0, 2b ] between the output word of the counter and that of the sampling flip-flops. Assume that the output of the counter is associated with zero phase difference. Hence, a difference in the interval [0, 2b ] between the sampled and the actual output word of the counter corresponds to a phase difference measurement included in the interval [0, 2b ] DCO cycles when the actual phase difference is zero. Notice that [0, 2b ] DCO cycles are approximately equal to [0, 2b /INC] cycles of the reference oscillator when the ADPLL has reached steady state.

6) applies. By contrast, when r esCn + th q (m − 1) is greater than or equal to r es Bn , there are two thresholds th B included in the interval [th A (m − 1), th A (m)], and we can write: th q (m) = r esCn − r es Bn + th q (m − 1). 18) Notice that we can obtain Eq. 7) from Eq. 18) by assuming that m = M + 1. 6 Dual Scale Time-to-Digital Converters and the Vernier Method 49 Fig. 12 Model of a sigma-delta modulator associated with the position of the thresholds of the scales of the Vernier method where the floor(·) operator rounds to the largest integer that is smaller than or equal to the argument.

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